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<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">izvestswsu</journal-id><journal-title-group><journal-title xml:lang="ru">Известия Юго-Западного государственного университета</journal-title><trans-title-group xml:lang="en"><trans-title>Proceedings of the Southwest State University</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">2223-1560</issn><issn pub-type="epub">2686-6757</issn><publisher><publisher-name>ЮЗГУ</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.21869/2223-1560-2025-29-4-111-124</article-id><article-id custom-type="elpub" pub-id-type="custom">izvestswsu-1519</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>ИНФОРМАТИКА, ВЫЧИСЛИТЕЛЬНАЯ ТЕХНИКА И УПРАВЛЕНИЕ</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="en"><subject>COMPUTER SCIENCE, COMPUTER ENGINEERING AND CONTROL</subject></subj-group></article-categories><title-group><article-title>Уменьшение аппаратных затрат цифровой фильтрации  в системе остаточных классов на основе усеченных  блоков умножения с накоплением</article-title><trans-title-group xml:lang="en"><trans-title>Reduction of digital filtering area in the residue number system based on truncated multiplication with accumulation blocks</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><contrib-id contrib-id-type="orcid">https://orcid.org/0000-0003-0487-4779</contrib-id><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Ляхов</surname><given-names>П. А.</given-names></name><name name-style="western" xml:lang="en"><surname>Lyakhov</surname><given-names>P. A.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Ляхов Павел Алексеевич, кандидат  физико-математических наук, заведующий кафедрой математического моделирования</p><p>ул. Пушкина, д. 1, г. Ставрополь 355017</p></bio><bio xml:lang="en"><p>Pavel A. Lyakhov, Cand of Sci. (Physico-Mathematical), Head of the Mathematical Modeling Department</p><p>1, Pushkin str., Stavropol 355017</p></bio><email xlink:type="simple">ljahov@mail.ru</email><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Северо-Кавказский федеральный университет</institution></aff><aff xml:lang="en"><institution>North Caucasus Federal University</institution></aff></aff-alternatives><pub-date pub-type="collection"><year>2025</year></pub-date><pub-date pub-type="epub"><day>08</day><month>01</month><year>2026</year></pub-date><volume>29</volume><issue>4</issue><fpage>111</fpage><lpage>124</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Ляхов П.А., 2026</copyright-statement><copyright-year>2026</copyright-year><copyright-holder xml:lang="ru">Ляхов П.А.</copyright-holder><copyright-holder xml:lang="en">Lyakhov P.A.</copyright-holder><license xml:lang="ru" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>Данная работа распространяется под лицензией Creative Commons Attribution 4.0.</license-p></license><license xml:lang="en" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://izvestswsu.elpub.ru/jour/article/view/1519">https://izvestswsu.elpub.ru/jour/article/view/1519</self-uri><abstract><sec><title>Цель исследования</title><p>Цель исследования. Параллельная обработка данных на основе системы остаточных классов позволяет уменьшить аппаратные затраты устройств цифровой фильтрации сигналов, что является одной из ключевых проблем цифровой обработки сигналов. Распараллеливание вычислений позволило разработать метод цифровой фильтрации сигналов на основе использования усеченных блоков умножения с накоплением в системе остаточных классов. В данной статье представлены преимущества применения разработанного подхода и его ограничения.</p></sec><sec><title>Методы</title><p>Методы. В исследовании применялись методы организации вычислений в системе остаточных классов с диапазонами в 32 и 48 бит и с использованием сбалансированных наборов модулей вида {2 − 1, 2 , 2 + 1}, аналитической оценки сложности вычислительного устройства и аппаратное моделирование в среде Synopsys Design Compiler с использованием стандартной библиотеки.</p></sec><sec><title>Результаты</title><p>Результаты. Снижение аппаратных затрат зафиксировано при использовании модулей специального вида {2 − 1, 2 , 2 + 1}, позволяющих уменьшить их до 16 139,30 мкм для фильтров 3-го порядка, 31 152,99 мкм для фильтров 7-го порядка, 62 507,06 мкм для фильтров 15-го порядка и 126 564,46 мкм для фильтров 31-го порядка с организацией арифметической обработки 32-разрядных данных в системе остаточных классов. Таким образом, аппаратные затраты были снижены на 21,5%-23,0% относительно фильтров на основе параллельно-префиксных сумматоров по методу Когге-Стоуна и на 20,6%-22,2% на основе сумматоров параллельного переноса с распространением. Для 48-битных цифровых фильтров с арифметической обработкой данных в системе остаточных классов результаты моделирования показали уменьшение аппаратных затрат от 9,45% до 14%, в зависимости от их порядка.</p></sec><sec><title>Заключение</title><p>Заключение. Проведение вычислений в системе остаточных классов позволяет улучшить эксплуатационные характеристики устройств цифровой обработки сигналов, для которых первостепенной задачей является минимизация аппаратных затрат.  </p></sec></abstract><trans-abstract xml:lang="en"><sec><title>Purpose of research</title><p>Purpose of research. Parallel data processing based on the residue number system allows to reduce the hardware costs of digital signal filtering devices, which is one of the key problems of digital signal processing. Parallelization of calculations allowed to develop a method of digital signal filtering based on the use of truncated blocks of multiplication with accumulation in the residue number system. This article presents the advantages of using the developed approach and its limitations.</p></sec><sec><title>Methods</title><p>Methods. The study used a method for organizing calculations in a system of residual classes with ranges of 32 and 48 bits and using balanced sets of modules of the form {2 − 1, 2 , 2 + 1}, an analytical assessment of the complexity of the device calculation, and hardware modeling in the Synopsys Design Compiler environment using the standard library.</p></sec><sec><title>Results</title><p>Results. The hardware cost reduction was recorded when using special modules {2 − 1, 2 , 2 + 1}, which allowed them to be reduced to 16,139.30  for 3-rd order filters, 31,152.99  for 7-th order filters, 62,507.06  for 15th order filters, and 126,564.46  for 31-st order filters with the organization of 32-bits arithmetic data processing in the residue number system. Thus, the hardware costs were reduced by 21.5%-23% relative to filters based on parallel-prefix adders using the Kogge-Stone method and by 20.6%-22.2% based on parallel carry adders with propagation. For 48-bit digital filters with arithmetic processing of data in the residue number system, the simulation results showed a reduction in hardware costs from 9.45% to 14% depending on their order.</p></sec><sec><title>Conclusion</title><p>Conclusion. Carrying out calculations in the system of residual classes allows improving the operational characteristics of digital signal processing devices, for which the primary task is to minimize hardware costs.</p></sec></trans-abstract><kwd-group xml:lang="ru"><kwd>система остаточных классов</kwd><kwd>цифровая обработка сигналов</kwd><kwd>цифровая фильтрация</kwd><kwd>площадь аппаратной реализации</kwd><kwd>блок умножения с накоплением</kwd></kwd-group><kwd-group xml:lang="en"><kwd>residue number system</kwd><kwd>digital signal processing</kwd><kwd>digital filtering</kwd><kwd>hardware implementation area</kwd><kwd>multiplyaccumulate block</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Sundararajan D. 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